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Completeness metrics for assertions

ASIC verification methodologies have come a long way over the past few years and are now at a point where we see most of our clients using some form of random constraint testing and assertion. We are...

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Staff Engineer (Job No. ESE15-4802)

Verify double data rate (DDR) memory controller subsystem intellectual property of complex system-on-chip (SoC); perform functional coverage models; design and develop efficient, reusable verification...

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Staff Design Engineer (Job No. ESE16-2906)

Design FPGA (Field Programmable Gate Array) microprocessor/microcontroller, create prototype, design reusable register-transfer level (RTL) blocks for multiple architectures, develop requirements for...

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Staff Design Engineer (Job No. ESE16-1104)

Architect and develop SoC level complex ASIC verification environments; develop full-chip level test-benches and test cases to verify functionality of the digital integrated circuits; architect and...

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